Video images frequently are compressed in order to reduce the bandwidth required for transmission. The compression typically is performed by one of several compression algorithms, such as MPEG-1, MPEG-2, MPEG-4, MPEG-4 AVC, H.263, H.263+, H.264, and proprietary algorithms. Such algorithms can result in blocks of data with low bit rates. However, when the blocks are decoded or decompressed, they are likely to result in objectionable artifacts that manifest themselves as blockiness, high frequency noise and ringing along edges of objects and banding in smoothly varying areas of an image. Each compression algorithm may include some form of filtering, including loop filtering or post filtering. At the present time, the filtering is implemented purely in software or firmware or as dedicated hardware for each algorithm. There is a need for hardware that can be internally configured to execute a variety of dynamic filtering algorithms. It is desirable that the filtering operations are performed at a high data throughput rate. It is desirable that the hardware that can perform the filtering algorithms be of low cost.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.